Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 12/19/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.7.3. Step 3: Run Fast Forward Compile

Fast Forward compilation generates design-specific timing closure recommendations, and predicts the maximum performance after the removal of all timing restrictions.

You can review the Fast Forward recommendations and implement the changes in your RTL that remove timing restrictions and enable mobility within the netlist for register Hyper-Retiming.

You can run Fast Forward compilation for the entire design hierarchy, or for only specific instances in the hierarchy, as Fast Forward Compile By Hierarchy describes.

To generate Fast Forward timing closure recommendations, follow these steps:

  1. Optionally, specify any of the following options if you want to automate or refine Fast Forward analysis:
    • If you want to run Fast Forward compilation during each full compilation, click Assignments > Settings > Compiler Settings > HyperFlex and enable Run Fast Forward Timing Closure Recommendations during compilation.
    • If you want to modify how Fast Forward compilation interprets specific I/O and block types, click Assignments > Settings > Compiler Settings > HyperFlex > Advanced Settings.
  2. On the Compilation Dashboard, click Fast Forward Timing Closure Recommendations. The Compiler runs prerequisite synthesis or Fitter stages automatically, as needed, and generates timing closure recommendations in the Compilation Report.
    Figure 79. Running Fast Forward Compilation
  3. View timing closure recommendations in the Compilation Report to evaluate design performance and implement key RTL performance improvements, as Step 4: Review Fast Forward Results describes.