Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 12/19/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.6.2.1.3. Analyzing High Fan-out Nets with Snapshot Viewer

  1. To run the Place or Route stage of the Fitter, double-click the stage in the Compilation Dashboard.
  2. After the stage completes, click the Snapshot Viewer icon for that stage in the Compilation Dashboard. The Snapshot Viewer opens.
  3. Under Analyze High Fanout Nets, click Show High Fanout Nets in the Schematic. The path displays and highlights in Tech Map Viewer for further analysis.
  4. Under Analyze High Fanout Nets, click Show High Fanout Nets in the Chip View. The path displays and highlights in the Chip Planner for further analysis.
    Figure 66. Non-Global High Fan-Out Signal in Chip Planner