High Bandwidth Memory (HBM2) Interface FPGA IP User Guide

ID 683189
Date 3/29/2024
Document Table of Contents

4.2.6. Register Map IP-XACT Support for HBM2 IP

IP-XACT is an XML format that describes reusable intellectual property (IP). When you generate an IP from the Quartus® Prime software version 20.4 or later, IP-XACT information for that IP is included in the generated .ip file. The generated IP-XACT information includes the register map for the HBM2 IP.

The register block that you can access is the User MMR to HBM controller block, within the HBM2 IP. You access this register block through the Advanced Peripheral Bus (APB) interface. (One APB interface is associated with every two HBM channels. For example, interface apb_0 is associated with channels CH0-1, interface apb_1 is associated with channels CH2-3, and so forth.)

For information on the registers available for you to access through the APB interface, refer to User-controlled Accesses to the HBM2 Controller, in the High Bandwidth Memory (HBM2) Interface Intel® FPGA IP Interface chapter.