50 Gbps Ethernet IP Core User Guide

ID 683158
Date 5/08/2017
Public
Document Table of Contents

7.3. RX MAC Registers

Table 21.  RX MAC Registers
Addr Name Description Reset Access
0x500 RXMAC_REVID

RX MAC revision ID for 50G Ethernet IP core.

0x0916 2016

RO
0x501 RXMAC_SCRATCH Scratch register available for testing. 0x0000 0000 RW
0x502 RXMAC_NAME_0

First 4 characters of IP core variation identifier string, "50gMACRxCSR".

0x3530 674D

RO

0x503 RXMAC_NAME_1 Next 4 characters of IP core variation identifier string, "ACRx". 0x4143 5278

RO

0x504 RXMAC_NAME_2 Final 4 characters of IP core variation identifier string, "00CSR". The "00" is unprintable. 0x0043 5352

RO

0x506 RXMAC_SIZE_CONFIG Specifies the maximum frame length available. The MAC asserts l2_rx_error[3] when the length of the received frame exceeds the value of this register. 0xXXXX 2580

RW

0x507 MAC_CRC_CONFIG The RX CRC forwarding configuration register. The following encodings are defined:
  • 1'b0 : Remove RX CRC, do not forward it to the RX client interface
  • 1'b1 : Retain RX CRC, forward it to the RX client interface
In either case, the IP core checks the incoming RX CRC and flags errors.
31'hX1'b0

RW

0x508 LINK_FAULT

Link Fault Status Register.

For regular (non-unidirectional) Link Fault, implements IEEE 802.3 BA Ethernet Clause 81.3.4.

For unidirectional Link Fault, implements IEEE 802.3 Ethernet Clause 66.

30'hX2'b00

RO

0x50A RXMAC_CONTROL RX MAC Control Register. The following bits are defined:
  • Bit[4] – Preamble check. Strict SFD checking option to compare each packet preamble to 0x555555555555. This field is available only if you turn on Enable strict SFD check .
  • Bit[3] – SFD check. Strict SFD checking option to compare each SFD byte to 0x5D. This field is available only if you turn on Enable strict SFD check .
  • Bit [1] – VLAN detection disabled. This bit is deasserted by default implying VLAN detection is enabled.
27'h0_5'b11X0X RW

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