50 Gbps Ethernet IP Core User Guide

ID 683158
Date 5/08/2017
Public
Document Table of Contents

1.4. Performance and Resource Utilization

The following table shows the typical device resource utilization for selected configurations using the current version of the Quartus® Prime software. With the exception of M20K memory blocks, the numbers of ALMs and logic registers are rounded up to the nearest 100. The timing margin for this IP core is a minimum of 15%.

Table 4.  Performance and Resource Utilization for 50GbE IP Core

The following results are for a variant that excludes all optional features.

Product

ALMs

Dedicated Logic Registers

M20K Memory Blocks

50GbE

9300

18600

3

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