3. 50GbE IP Core Parameters
The 50GbE parameter editor provides the parameters you can set to configure the 50GbE IP core and simulation testbenches.
The 50GbE parameter editor includes an Example Design tab. For information about that tab, refer to the 50G Ethernet Design Example User Guide.
|Device Family||Arria 10||Arria 10||Selects the device family.|
|Enable link fault generation||Enabled, Disabled||Disabled||When enabled, the IP core implements link fault signaling as defined in the IEEE 802.3-2012 IEEE Standard for Ethernet. The MAC includes a Reconciliation Sublayer (RS) to manage local and remote faults. When enabled, the local RS TX logic can transmit remote fault sequences in case of a local fault and can transmit IDLE control words in case of a remote fault.|
|Enable strict SFD checking||Enabled, Disabled||Disabled||When enabled, the IP core can implement strict SFD checking, depending on register settings.|
|Enable preamble passthrough||Enabled, Disabled||Disabled||When enabled, the IP core is in RX and TX preamble pass-through mode. In RX preamble pass-through mode, the IP core passes the preamble and Start Frame Delimiter (SFD) to the client instead of stripping them out of the Ethernet packet. In TX preamble pass-through mode, the client specifies the preamble and provides the SFD to be sent in the Ethernet frame.|
|Configuration, Debug and Extension Options|
|Enable Altera Debug Master Endpoint (ADME)||Enabled, Disabled||Disabled||
If enabled, the IP core turns on the following features in the Arria 10 PHY IP core that is included in the 50GbE IP core:
If turned off, the IP core is configured without these features.
For information about these Arria 10 features, refer to the Arria 10 Transceiver PHY User Guide. .
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