Intel® Quartus® Prime Pro Edition User Guide: Design Constraints

ID 683143
Date 9/26/2022
Document Table of Contents Specifying Multi-Dimensional Bus Constraints

The Intel® Quartus® Prime Pro Edition software traditionally supports only 1- and 2-dimensional bus names for specifying constraints. The Intel® Quartus® Prime Pro Edition version 19.3 and later now supports multi-dimensional bus names for more efficient constraints.

For example, you can specify the following assignment to apply a constraint to all bits in the reg [31:0] r [0:2][4:5] three-dimensional bus:

set_instance_assignment -name PRESERVE_REGISTER ON -to r

The constraint then applies to all bits r: [0][4][31], r[0][4][30], … , r[1][5][0].

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