126.96.36.199. Specify Instance-Specific Constraints in Assignment Editor 188.8.131.52. Specifying Multi-Dimensional Bus Constraints 184.108.40.206. Specify I/O Constraints in Pin Planner 220.127.116.11. Plan Interface Constraints in Interface Planner and Tile Interface Planner 18.104.22.168. Adjust Constraints with the Chip Planner 22.214.171.124. Constraining Designs with the Design Partition Planner
126.96.36.199. Specify I/O Constraints in Pin Planner
Intel® Quartus® Prime Pin Planner allows you to assign design elements to I/O pins. You can also plan and assign IP interface or user nodes not yet defined in the design.
Figure 2. Pin Planner GUI