126.96.36.199. Specify Instance-Specific Constraints in Assignment Editor 188.8.131.52. Specifying Multi-Dimensional Bus Constraints 184.108.40.206. Specify I/O Constraints in Pin Planner 220.127.116.11. Plan Interface Constraints in Interface Planner and Tile Interface Planner 18.104.22.168. Adjust Constraints with the Chip Planner 22.214.171.124. Constraining Designs with the Design Partition Planner
126.96.36.199. Flow Controls
The Flow control panel provides immediate access to common Tile Interface Planner commands from anywhere within Tile Interface Planner.
|Initialize Tile Interface Planner||Launches the placement legality engine and loads the component IP and target device data that Design Analysis extracts.|
|View Assignments||Opens the Assignments tab, which allows you to review and enable or disable any existing placement assignments for the current planning session.|
|Update Plan||Optionally applies a previous tile planning session fixed placement assignments from the .qsf, and movable placements from a .json to the current tile interface plan.|
|Plan Design||Opens the Plan tab for placing component IP in the tile interface plan.|
|Save Assignments||Opens the Save Assignments dialog box for saving the fixed tile constraints to the project .qsf and the movable building block constraints to a .json file.|
Figure 48. Tile Interface Planner Flow Control
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