188.8.131.52. Specify Instance-Specific Constraints in Assignment Editor 184.108.40.206. Specifying Multi-Dimensional Bus Constraints 220.127.116.11. Specify I/O Constraints in Pin Planner 18.104.22.168. Plan Interface Constraints in Interface Planner and Tile Interface Planner 22.214.171.124. Adjust Constraints with the Chip Planner 126.96.36.199. Constraining Designs with the Design Partition Planner
188.8.131.52.3. Legal Locations Pane
The Legal Locations pane lists the legal locations for tile placement that the legality engine determines. You can enter a text string in the Filter field to limit the list.
- Click any legal location in the list to highlight that location in the tile visualization pane.
- Double-click any legal location in the list to assign placement to that tile location.
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