AN 833: Intel® Stratix 10® GX 16-Lane RX JESD204B-ADC12DJ3200 Interoperability Reference Design

ID 683049
Date 12/19/2017

Configuring the FPGA

To configure the FPGA, follow these steps:
  1. Before configuring the FPGA, ensure the following:
    1. The Intel® FPGA Download Cable II driver is installed on the host computer.
    2. The Intel® Stratix® 10 Transceiver Signal Integrity Development Kit is powered on.
    3. No other running application is using the JTAG chain.
  2. In the Intel® Quartus® Prime Programmer, select Hardware Setup > Stratix 10H SI Dev Kit[USB-1].
  3. Click Auto Detect to display the devices in the JTAG chain. Select device 1SG280HU2S1.
  4. Right click and select Change File. Choose the appropriate SRAM Object File (.sof) from the <project directory>/output_files directory. Click Open.
  5. Turn on Program/Configure for the .sof file.
  6. Click Start to program the image into the FPGA.
Figure 5.  Intel® Quartus® Prime Programmer