AN 793: Intel® Arria® 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design

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ID 683020
Date 6/13/2017
Public
Document Table of Contents
Document Table of Contents x
Arria® 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design
Arria® 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design x
Reference Design Components Reference Design Folders and Files Quick Start Guide Rebuilding the Nios II Software Reference Design Debug Features Known Issues Revision History
Reference Design Components x
Clocking Scheme DisplayPort IP Core Video and Image Processing Block External Memory Interface Nios II Processor Transceiver Push Buttons and LEDs
Quick Start Guide x
Hardware and Software Requirements Compiling and Running the Reference Design Viewing the Result
Arria® 10 DisplayPort 4Kp60 with Video and Image Processing Pipeline Retransmit Reference Design

Revision History

Date Version Changes
June 2017 2017.06.13
  • Edited the reference design block diagram to reflect the updated reference design.
  • Edited the files and folders based on the updated reference design.
  • Changed DDR3 to DDR4. The updated reference design uses DDR4 running at 1066 MHz.
  • Updated the information on the required monitors for testing. The updated reference design is tested with AMD Radeon HD 7700 graphic card, and NVIDIA NVS 310 and ASUS MG28UQ 4K monitors.
  • Changed the reset to CPU_RESETn based on the updated reference design.
  • Added additional information about the VIP IP core parameters.
  • Updated the supported resolution with full screen display information for the monitors.
December 2016 2016.12.28 Initial release.
Level Two Title