Push Buttons and LEDs
The reference design uses the push buttons and LEDs on the Arria® 10 FPGA Development Kit as functional indicators.
| Function | Pin Number/I/O Standard | Schematic Net Name | Reference Designator | Description |
|---|---|---|---|---|
| Reset | BD27/1.8V |
CPU_RESETn |
S4 |
Resets the reference design. |
| Display MSA values | T12/1.8V |
USER_PB0 |
S3 |
Display the current TX/RX MSA values and link configuration on the Nios II terminal. |
| Function | Pin Number/I/O Standard | Schematic Net Name | Reference Designator | Description |
|---|---|---|---|---|
| DisplayPort Sink video locked | L28/1.8V |
USER_LED_G0 |
D10 |
When illuminated, it indicates that the DisplayPort Sink video output stream to the Clocked Video Input IP core is stable. |
| DisplayPort Sink lane count | K26/1.8V K25/1.8V L25/1.8V J24/1.8V A19/1.8V |
USER_LED_G1 USER_LED_G2 USER_LED_G3 USER_LED_G4 USER_LED_G5 |
D9 D8 D7 D6 D5 |
5-bit indicator of the lane count at the DisplayPort Sink. The LED arrangement is {D5, D6, D7, D8, D9}:
If LED D7 illuminates while other LEDs are off, the lane count at the DisplayPort Sink is 4. |
| DisplayPort Sink link rate | C18/1.8V D18/1.8V |
USER_LED_G6 USER_LED_G7 |
D4 D3 |
2-bit indicator of the link rate at the DisplayPort Sink. The LED arrangement is {D3, D4}:
If LED D3 illuminates while LED D4 is off, the DisplayPort Sink is operating at HBR2 link rate. |
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