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Ixiasoft
2.4.3. Intel® Stratix® 10 器件中带校准的RT OCT
Intel® Stratix® 10 器件支持所有LVDS I/O bank(非3 V I/O bank)中带校准的RT OCT。带校准的RT OCT仅适用于输入和双向管脚的配置。输出管脚配置不支持带校准的RT OCT。如果使用RT OCT,则bank上VCCIO必须与使能RT OCT的管脚的I/O标准相匹配。
I/O标准 | 已校准OCT(输入) | |
---|---|---|
RT (Ω) | RZQ (Ω) | |
SSTL-18 Class I | 50 | 100 |
SSTL-18 Class II | 50 | 100 |
SSTL-15 Class I | 50 | 100 |
SSTL-15 Class II | 50 | 100 |
SSTL-15 | 48, 60,120 | 240 |
SSTL-135 | 48, 60, 120 | 240 |
SSTL-125 | 48, 60, 120 | 240 |
SSTL-12 | 60, 120 | 240 |
POD12 | 34, 40, 48, 60, 80, 120, 240 | 240 |
1.8 V HSTL Class I | 50 | 100 |
1.8 V HSTL Class II | 50 | 100 |
1.5 V HSTL Class I | 50 | 100 |
1.5 V HSTL Class II | 50 | 100 |
1.2 V HSTL Class I | 50 | 100 |
1.2 V HSTL Class II | 50 | 100 |
Differential SSTL-18 Class I | 50 | 100 |
Differential SSTL-18 Class II | 50 | 100 |
Differential SSTL-15 Class I | 50 | 100 |
Differential SSTL-15 Class II | 50 | 100 |
Differential SSTL-15 | 48, 60,120 | 240 |
Differential SSTL-135 | 48, 60, 120 | 240 |
Differential SSTL-125 | 48, 60, 120 | 240 |
Differential SSTL-12 | 60, 120 | 240 |
Differential POD12 | 34, 40, 48, 60, 80, 120, 240 | 240 |
Differential 1.8 V HSTL Class I | 50 | 100 |
Differential 1.8 V HSTL Class II | 50 | 100 |
Differential 1.5 V HSTL Class I | 50 | 100 |
Differential 1.5 V HSTL Class II | 50 | 100 |
Differential 1.2 V HSTL Class I | 50 | 100 |
Differential 1.2 V HSTL Class II | 50 | 100 |
RT OCT校准电路对比I/O缓冲器的总阻抗与连接到RZQ管脚的外部电阻。该电路动态使能或禁用晶体管直到I/O缓冲器的总阻抗与外部电阻相匹配。
器件配置的最后阶段进行校准。当校准电路发现正确的阻抗时,就会掉电并停止更改驱动器的特性。
图 9. 带校准的RT OCT