Power and Thermal Analyzer User Guide

Download PDF
ID 865226
Date 9/29/2025
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Power and Thermal Analyzer 2. Estimating Power Consumption with the Power and Thermal Analyzer 3. Power and Thermal Analyzer (PTA) Graphical User Interface 4. Power and Thermal Analyzer Resource Types 5. Command Line Options and Scripting 6. Factors Affecting the Accuracy of the Power and Thermal Analyzer 7. Document Revision History for the Power and Thermal Analyzer User Guide A. Measuring Static Power B. Tcl Command Reference
1. Overview of the Power and Thermal Analyzer x
1.1. Accessing the Power and Thermal Analyzer 1.2. PTA Power Model Status 1.3. Definitions of Power Terms Used in this Document
2. Estimating Power Consumption with the Power and Thermal Analyzer x
2.1. Estimating Power Before Starting the FPGA Design 2.2. Estimating Power While Creating the FPGA Design 2.3. Estimating Power After Completing the FPGA Design 2.4. Estimating Power for Dual-Core Devices
3. Power and Thermal Analyzer (PTA) Graphical User Interface x
3.1. PTA - Device Selector Dialog Box 3.2. PTA - Primary GUI Components 3.3. PTA - Hierarchical Design Editor 3.4. PTA - Using Design Hierarchies in the Power and Thermal Analyzer 3.5. PTA - Entering Hierarchy Information Into the PTA 3.6. PTA - Current Drawn per Supply Tab 3.7. PTA - Temperature and Cooling Tab 3.8. PTA - Resource Utilization Panel 3.9. PTA - Register Dynamic Power in Agilex Devices 3.10. PTA - Input Fields 3.11. PTA - Data Entry Error Messages 3.12. PTA - Search Features 3.13. PTA - Filtered Searches 3.14. PTA - Using the Tcl Console to Perform Searches
4. Power and Thermal Analyzer Resource Types x
4.1. PTA - Power Summary 4.2. PTA - Root Entry 4.3. PTA - Instance 4.4. PTA - Logic Resource Type 4.5. PTA - RAM Resource Type 4.6. PTA - DSP Resource Type 4.7. PTA - Clock Resource Type 4.8. PTA - PLL Resource Type 4.9. PTA - I/O Resource Type 4.10. PTA - Transceiver Resource Type 4.11. PTA - Crypto Resource Type 4.12. PTA - NOC Resource Type 4.13. PTA - HBM Resource Type
4.10. PTA - Transceiver Resource Type x
4.10.1. PTA - Estimating E-Tile Channel PLL Power
5. Command Line Options and Scripting x
5.1. Invoking the Power and Thermal Analyzer from the Command Line 5.2. Running Scripts with the Power and Thermal Analyzer
6. Factors Affecting the Accuracy of the Power and Thermal Analyzer x
6.1. Toggle Rate 6.2. I/O Bank Allocation
B. Tcl Command Reference x
B.1. add B.2. copy B.3. delete B.4. edit B.5. export_design_file B.6. find_instances B.7. get_available_ips B.8. get_available_resource_types B.9. get_available_values B.10. get_first_error B.11. get_properties B.12. get_report B.13. get_report_names B.14. get_results B.15. get_value B.16. import_design_file B.17. move B.18. open_design_file B.19. pta::get_active_design B.20. pta::get_defaults B.21. pta::get_designs B.22. pta::locate B.23. pta::set_active_design B.24. pta::set_family B.25. recalculate_power B.26. redo B.27. save B.28. set_device B.29. set_view B.30. undo
1. Overview of the Power and Thermal Analyzer
2. Estimating Power Consumption with the Power and Thermal Analyzer
3. Power and Thermal Analyzer (PTA) Graphical User Interface
4. Power and Thermal Analyzer Resource Types
5. Command Line Options and Scripting
6. Factors Affecting the Accuracy of the Power and Thermal Analyzer
7. Document Revision History for the Power and Thermal Analyzer User Guide
A. Measuring Static Power
B. Tcl Command Reference

3.3. PTA - Hierarchical Design Editor

The Hierarchical Design Editor tab in the Data Entry pane displays the dynamic power consumption for each resource in the hierarchy of the design. The Hierarchical Design Editor allows you to enter and modify hierarchy names, add and remove resource entries, and delete unneeded hierarchy levels.

Add Dialog

The Hierarchical Design Editor tab has an Add dialog box which you can use to add resources or IP to your design. Click the Add button to open the dialog box.

Figure 15.  Add Button
Figure 16.  Add Dialog Box
The resources and IPs available for selection vary, depending on the currently selected device. A description of the available resource types is available in the table below.
Table 4.  PTA Resource Types
Resource Type Description
Clock Allows you to specify the properties of the clock networks of separate clock domains in your design. Specify the clock domain name, clock frequency, total fan-out, and other properties about the clocks in your design.
Crypto Allows you to specify the properties of crypto resources and their settings for all entities in your design, such as the entity name, full hierarchy name, and number of instances. (Agilex FPGA portfolio devices with crypto blocks only).
DSP Allows you to specify the properties of DSP design entities. Specify the DSP configuration, clock frequency, toggle percentage, and register usage for the DSPs in your design.
HBM Allows you to specify the properties of high-bandwidth memory (HBM) entities in your design. (Devices with HBM blocks only).
I/O Allows you to specify the properties of design entities using general-purpose I/O pins. This resource type does not apply to transceiver I/O pins. Specify I/O standard, input termination, current strength or output termination, data rate, clock frequency, output enable static probability, and capacitive load for the I/O in your design.
Logic Allows you to specify the properties of logic resources for all entities in your design.
NOC The dynamic power consumed by the network-on-chip system (NoC). (Devices with NOC only.)
PLL Allows you to specify the properties of one or more PLLs in your design.
RAM Allows you to specify the properties of design entities implemented in RAM blocks. Specify the RAM type, data width, RAM depth (if applicable), RAM mode, and port parameters for these entities in your design.
Transceiver Allows you to specify the transceiver resources and their settings for your design entities.

Context Menu

Figure 17. PTA Hierarchical Design Editor


Table 5.   Hierarchical Design Editor Options
Button or Control Description
Expand All Expands all hierarchy at current level and below.
Collapse All Collapses all hierarchy at current level and below.
Add New Instance Adds an instance to the currently selected level.
Add IPs Adds an IP selected in the associated submenu to the design at the currently selected level.
Add Resources Adds a resource selected in the associated submenu to the design at the currently selected level.
Rename Rename the currently selected item (Only available for instances).
Duplicate Duplicates the currently selected level of hierarchy or resource.
Delete Deletes the currently selected level of hierarchy or resource.
Copy Copies the currently selected level of hierarchy or resource to the clipboard.
Copy Text Copies the name of the selected item to the clipboard. For resources also copies the resource type, and power figures.
Cut Copies the currently selected level of hierarchy or resource to the clipboard and marks it for deletion on paste.
Paste Pastes the previously copied level of hierarchy or resource into the current location.
Import Opens the Import Dialog dialog box to import the resources in a newly selected .pta, .ptc, .qpta, or qptc file to the selected level of hierarchy.
Export Exports the currently selected item and those below it in hierarchy to a .pta file.

In the Hierarchical Design Editor, you enter information about your design that informs the power estimation calculations. Entry is at the hierarchal level. The Power and Thermal Analyzer (PTA) uses the values that you specify on the resource entries to calculate the power consumption and other data.

Figure 18. Selection of Resource Type to Add to the Estimation

Adding IPs

The Power and Thermal Analyzer supports a selection of IPs to add to the design. The IPs available depend on the currently selected device.

Figure 19. Add IPs Sub-menu

You can edit parameters of the selected IP in the Property Editor panel after addition:

Figure 20. Property Editor Panel

Level Two Title