3.1.1. The dla_build_example_design.py Command
The FPGA AI Suite design example utility (dla_build_example_design.py) configures and compiles the bitstreams for the FPGA AI Suite design examples. The command has the following basic syntax:
dla_build_example_design.py [--logfile logfile] [--debug] [action]where [action] is one of the following actions:
Action | Description |
---|---|
list | List the available example designs. |
build | Build an example design. |
qor | Generate QoR reports. |
quartus-compile | Run a Quartus® Prime compile. |
scripts | Managed the build support scripts. |
By default, the dla_build_example_design.py command always instructs the dla_create_ip command to create licensed IP. If no license can be found, inference-limited, unlicensed RTL is generated. The build log indicates if the IP is licensed or unlicensed. For more information about licensed and unlicensed IP, refer to "The --unlicenced/--licenced Options" in FPGA AI Suite IP Reference Manual .
Getting dla_build_example_design.py Command Help
dla_build_example_design.py --help
dla_build_example_design.py action --help
Command Logging and Debugging
By default, the FPGA AI Suite design example utility logs its output to a set location in the (default) build_platform directory. Override this location by specifying the --logfile logfile option.
For extra debugging output, specify the --debug option.
Both the logging and debugging options must be specified before the command action.