FPGA AI Suite: Design Examples User Guide

ID 848957
Date 4/30/2025
Public
Document Table of Contents

3.1.1. The dla_build_example_design.py Command

The FPGA AI Suite design example utility (dla_build_example_design.py) configures and compiles the bitstreams for the FPGA AI Suite design examples. The command has the following basic syntax:

dla_build_example_design.py [--logfile logfile] [--debug] [action]
where [action] is one of the following actions:
Table 4.  Design Example Utility Actions
Action Description
list List the available example designs.
build Build an example design.
qor Generate QoR reports.
quartus-compile Run a Quartus® Prime compile.
scripts Managed the build support scripts.
Some of the command actions have different additional required and optional parameters. Use the command help to see a list of available options for the command and its actions.

By default, the dla_build_example_design.py command always instructs the dla_create_ip command to create licensed IP. If no license can be found, inference-limited, unlicensed RTL is generated. The build log indicates if the IP is licensed or unlicensed. For more information about licensed and unlicensed IP, refer to "The --unlicenced/--licenced Options" in FPGA AI Suite IP Reference Manual .

Getting dla_build_example_design.py Command Help

For general help with the command and to see the list of available actions, run the following command:
dla_build_example_design.py --help
For help with a command actions and to the list of available options and arguments required for an action, run the following command:
dla_build_example_design.py action --help

Command Logging and Debugging

By default, the FPGA AI Suite design example utility logs its output to a set location in the (default) build_platform directory. Override this location by specifying the --logfile logfile option.

For extra debugging output, specify the --debug option.

Both the logging and debugging options must be specified before the command action.