FPGA AI Suite: Design Examples User Guide

ID 848957
Date 4/30/2025
Public
Document Table of Contents

19.5.1.2. [SOC] Programming the Agilex™ 5 FPGA Device with the JTAG Indirect Configuration (.jic) File

Programming the Agilex™ 5 device with the JTAG indirect configuration (.jic) file programs the QSPI flash memory and allows the FPGA device to be automatically configured when power is applied to the board.

To program the Agilex™ 5 FPGA device with the JTAG indirect configuration (.jic) file:
  1. Connect the Agilex™ 5 FPGA E-Series 065B Modular Development Kit to your host development system via JTAG micro USB connection as shown in the following diagram:
  2. Switch the board into JTAG mode by setting the S4[1:2] DIP switch to OFF/OFF:
  3. Program the QSPI with the .jic file by running the following commands on the host development system:
    cd $COREDLA_ROOT/demo/ed4/agx5_soc_s2m/sd-card/
    
    quartus_pgm -m jtag -o "pvi;u-boot-spl-dtb.hex.jic@<device_number>"
    where <device_number> is 1 or 2, depending on whether the HPS is already running (that is, the prior state of the device). Use 1 if the HPS is not running, and 2 if the HPS is already running. If you do not know the state of the device, try 1. If that fails, try 2.
  4. Switch the board into QSPI mode by setting the S4[1:2] DIP switch to ON/ON and cycle the power to the board.

    At boot time, the Agilex™ 5 FPGA device is configured from the QSPI flash memory.