FPGA AI Suite: Design Examples User Guide

ID 848957
Date 4/30/2025
Public
Document Table of Contents

16.4. [HL-JTAG] Programming the FPGA Device

Before you program the FPGA device, ensure that the USB-JTAG connection and port permissions are set up as described in [HL-JTAG] Hardware Requirements.

Program the FPGA device with Quartus® Prime Programmer and FPGA bitstream that you generated in [HL-JTAG] Building an FPGA Bitstream for the JTAG Design Examples with the following commands:
cd $COREDLA_WORK/build_agx5_jtag_ed

quartus_pgm -c 1 -m jtag -o "p;AGX5_Generic.sof"