19.3.2. [SOC] Building the FPGA Bitstreams
The FPGA AI Suite SoC design example also includes prebuilt demonstration FPGA bitstreams. If you want to use the prebuilt demonstration bitstreams in your SD card image, skip ahead to [SOC] Installing HPS Disk Image Build Prerequisites.
If you build your own bitstreams and do not have an FPGA AI Suite IP license, then your bitstream have a limit of 10000 inferences. After 10000 inferences, the unlicensed IP refuses to perform any additional inference. To reset the limit, reprogram the FPGA device.
Building the FPGA Bitstream for the Agilex™ 5 FPGA E-Series 065B Modular Development Kit
dla_build_example_design.py build \ --output-dir $COREDLA_WORK/agx5_perf_bitstream \ -n 1 \ agx5_soc_s2m \ $COREDLA_ROOT/example_architectures/AGX5_Performance.arch
The bitstream built by this command supports both the M2M execution model and the S2M execution model.
Building the FPGA Bitstream for the Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit
dla_build_example_design.py build \ --output-dir $COREDLA_WORK/agx7_perf_bitstream \ -n 1 \ agx7_soc_s2m \ $COREDLA_ROOT/example_architectures/AGX7_Performance_LayoutTransform.arch
The bitstream built by this command supports both the M2M execution model and the S2M execution model.
This design example bitstream is built with a "LayoutTransform" architecture because the design example uses the FPGA AI Suite IP internal layout transform rather than an external layout transform for converting image buffers to the target memory format. The layout transform is required for S2M bitstreams, but is optional for M2M bitstreams. For more information about the layout transform hardware, refer to "Input Feature Tensor In-Memory Format" in FPGA AI Suite: IP Reference Manual .
Building the FPGA Bitstream for the Arria® 10 SX SoC FPGA Development Kit
dla_build_example_design.py build \ --output-dir $COREDLA_WORK/a10_perf_bitstream \ -n 1 \ a10_soc_s2m \ $COREDLA_ROOT/example_architectures/A10_Performance.arch
The bitstream built by this command supports both the M2M execution model and the S2M execution model.