FPGA AI Suite: Design Examples User Guide

ID 848957
Date 4/30/2025
Public
Document Table of Contents

10. [HL-NO-DDR] Getting Started with the FPGA AI Suite DDR-Free Design Example

The FPGA AI Suite DDR-free design example is provided with the FPGA AI Suite. Before starting with the FPGA AI-Suite DDR-free design example, ensure that you have followed all the installation instructions for the FPGA AI Suite compiler and IP generation tools.

The DDR-free design example is validated for use only with Quartus® Prime Pro Edition Version 24.3 and Version 25.1.