19. [SOC] FPGA AI Suite SoC Design Example Quick Start Tutorial
The SoC design example quick start tutorial provides instructions to do the following tasks:
- Build a bitstream and flash card image for the FPGA development kit.
- Run the dla_benchmark utility from the example runtime on the SoC FPGA HPS ( Arm* processor) host. This example runtime uses the memory-to-memory (M2M) model.
- Run the streaming image application that streams data from the HPS Arm* processor host to the FPGA device in a way that mimics how data is streamed from any other input source (such as Ethernet, HDMI, or MIPI). This streaming image application uses the steaming-to-memory (S2M) model.
SoC Design Example Quick Start Tutorial Prerequisites
Before you start the tutorial ensure that you have successfully completed the installation tasks outlined in "Installing the FPGA AI Suite Compiler and IP Generation Tools" in the FPGA AI Suite Getting Started Guide .
The remaining sections of the FPGA AI Suite Getting Started Guide can help you understand the overall flow of using the FPGA AI Suite, but they are not required to complete this quick start tutorial.
In this section, some overlay architecture (.arch) files referred to in the instructions include the suffix " LayoutTransform ". This indicates that the FPGA AI Suite internal layout transform (described in the FPGA AI Suite IP Reference Manual) is enabled. On Agilex™ 7 devices, this internal layout transform must be enabled for S2M operation, and is optional for M2M operation.
Section Content
[SOC] Initial Setup
[SOC] Initializing a Work Directory
[SOC] (Optional) Create an SD Card Image (.wic)
[SOC] Writing the SD Card Image (.wic) to an SD Card
[SOC] Preparing SoC FPGA Development Kits for the FPGA AI Suite SoC Design Example
[SOC] Adding Compiled Graphs (AOT files) to the SD Card
[SOC] Verifying FPGA Device Drivers
[SOC] Running the Demonstration Applications