FPGA AI Suite: Design Examples User Guide

ID 848957
Date 4/30/2025
Public
Document Table of Contents

8. [OFS-PCIE] Getting Started with Open FPGA Stack (OFS) for PCIe* -Attach Design Examples

Before starting with the FPGA AI Suite OFS for PCIe* -attach design example, ensure that you have followed all the installation instructions for the FPGA AI Suite compiler and IP generation tools and completed the design example prerequisites as provided in the FPGA AI Suite Getting Started Guide .

The FPGA AI Suite OFS for PCIe* -attach design example supports Agilex™ 7 PCIe* Attach OFS on the following boards:
  • Agilex™ 7 FPGA I-Series Development Kit ES2 (DK-DEV-AGI027RBES)
  • Intel® FPGA SmartNIC N6001-PL Platform (without Ethernet controller)

Open FPGA Stack (OFS) Requirements

For Open FPGA Stack (OFS) support, ensure that you have completed the OFS installation and configuration for your board, including the Open Programmable Acceleration Engine (OPAE) and Device Feature List (DFL) as outlined in the Agilex™ 7 PCIe* Attach OFS Workload Development Guide .

Additionally, you might need additional environment configuration such as development permissions such as those provided in the setup_persmissions.sh script provided by the oneAPI Accelerator Support Package (ASP).

Additional Agilex™ 7 FPGA I-Series Development Kit Configuration

For the Agilex™ 7 FPGA I-Series Development Kit, the development kit provides a single 16 GB DIMM that you must replace with two 8 GB DIMMs in the board DIMM Sockets.

This design example was developed and tested to work with the following DIMMs:
  • Micron MTA8ATF1G64AZ-2G6E1
  • Hynix HMA81GU6JJR8N-VK