MIPI D-PHY IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs

ID 817561
Date 6/30/2025
Public
Document Table of Contents

8.2.2.13. CAL_ERROR_LANES

Offset: 0x18A
Default: 0x00
Description: Calibration error status per lane
Bit Name Access Description
7:0 CAL_ERROR_LANES Read Only Calibration error status per lane.