Agilex™ 5 FPGAs and SoCs Device Data Sheet

ID 813918
Date 8/11/2025
Public
Document Table of Contents

Programmable IOE Delay

Table 118.  Programmable IOE Delay Specifications For specification status, see the Data Sheet Status table
Parameter Maximum Offset Minimum Offset Fast Model Slow Model Unit
–E1V, –I1V –E2V, –I2V –E3V, –I3V –E4S, –I4S –E5S, –I5S –E6S, –I6S, –E6X, –I6X
Input Delay Chain (INPUT_DELAY_CHAIN) 63 0 1.798 2.965 3.449 4.495 4.479 4.906 6.304 ns
Output Delay Chain (OUTPUT_DELAY_CHAIN) 15 0 0.435 0.743 0.84 1.109 1.1 1.204 1.554 ns
Output Enable Delay Chain (OUTPUT_EENABLE_DELAY_CHAIN) 15 0 0.436 0.743 0.842 1.108 1.099 1.204 1.553 ns