Intel Agilex® 7 F-Series FPGA (Two F-Tiles) Development Kit User Guide

ID 739942
Date 8/07/2023
Document Table of Contents

5.3. Avalon® -ST x16 Configuration Mode

When set to the Avalon® -ST x16 mode, the Intel® MAX® 10 System Controller (U5) acts as the configuration host to manage configuration download. After power on, the Intel® MAX® 10 reads the configuration bitstream programmed into the QSPI flash (U4) and sends this data to FPGA SDM interface to program the FPGA. The U4 is a 2 Gb QSPI flash device, allowing for four FPGA images to be stored. Image download selection is controlled by jumpers J105 and J106 as listed in the following table. The default image to be programmed is image 0.

Note: Do not use U3, it is just hardware backup for future use.
Table 6.  Image Download Selection
Image Selection J106 J105 Notes
Image 0 Installed Installed Image 0—Default
Image 1 Open Installed Image 1
Image 2 Installed Open Image 2
Image 3 Open Open Image 3