Intel Agilex® 7 F-Series FPGA (Two F-Tiles) Development Kit User Guide

ID 739942
Date 8/07/2023
Document Table of Contents

A.7. Intel® MAX® 10 SPI Bus

The Intel® MAX® 10 device uses the SPI bus for reading telemetry information from the Analog Devices LTC3888 VCC core controller.
Table 39.  SPI Signals
Schematic Signal Name FPGA Pin Number I/O Standard Description
LTC_1V8_SDI L2 1.8 V CMOS SPI data
LTC_1V8_SCK N2 1.8 V CMOS SPI clock
LTC_1V8_SPI_ERRn M1 1.8 V CMOS SPI error status
LTC_1V8_SCSn P1 1.8 V CMOS SPI chip select