Visible to Intel only — GUID: tty1660244987769
Ixiasoft
A.1. Board Overview and Components
A.2. FPGA Configuration
A.3. Default Switch and Jumper Settings
A.4. Input and Output Components
A.5. Components and Interfaces
A.6. I2C
A.7. Intel® MAX® 10 SPI Bus
A.8. Clock Circuits
A.9. HPS Daughter Card
A.10. System Power
A.11. Power Guidelines
A.12. Power Distribution System
A.13. Power Measurement
A.14. Thermal Limitations and Protection
Visible to Intel only — GUID: tty1660244987769
Ixiasoft
5.1. JTAG Configuration Mode
When MSEL[2:1] are both set to logic high by DIP switch SW3[2:1] = [OFF:OFF], the configuration mode defaults to JTAG.