AN 960: JESD204C Intel® FPGA IP and ADI AD9081 MxFE* ADC Interoperability Report for Intel Agilex® 7 E-Tile Devices

ID 709330
Date 3/27/2023

1.4. Interoperability Methodology

The following section describes the test objectives, procedure, and the passing criteria. The test covers the following areas:
  • Receiver data link layer
  • Receiver transport layer
  • Deterministic Latency (Subclass 1)

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