PCB Stackup Design Considerations for Intel® FPGAs

ID 683883
Date 6/28/2017
Public
Document Table of Contents
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1.2. Material Selection

The complex FPGA boards that incorporate the Stratix® 10 device families of transceiver technologies require higher layer counts as well as lower loss materials to run at up to 56 Gbps. High layer count facilitates the high density signal break-out, routing, and power distribution, while the high-performance low-loss material is required to successfully transmit and receive 10 Gbps+ transceiver data rates over extended backplane channel lengths. High layer count PCBs often suffer from lamination and drilling challenges in the PCB manufacturing process. Together with low-loss materials, they put added cost pressure on the system designer. To meet these challenges, designers must understand the material properties that influence signal loss and PCB manufacturability in order to properly select the best performance material at the lowest cost for a successful and robust design.