PCB Stackup Design Considerations for Intel® FPGAs

ID 683883
Date 6/28/2017
Public
Document Table of Contents
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1.6. Conclusion

High-speed FPGA designs at data rates of 10 Gbps and higher require careful attention to material selection and layer stack planning to ensure a robust PCB design. This application note provides a detailed understanding of the PCB stackup construction with considerations for material selection and PCB manufacturability, as well as best practice guidelines for designing the layer stackup arrangement. Specific stackup design guidelines for Intel® FPGA device families are provided at the end of this application note.