1.7.1. Stratix® 10 Device Recommendations
1.7.2. Stratix® V Device Recommendations
1.7.3. Stratix IV Device Recommendations
1.7.4. Arria® 10 Device Recommendations
1.7.5. Arria® V Device Recommendations
1.7.6. Arria II Device Recommendations
1.7.7. Cyclone® 10 Device Recommendations
1.7.8. Cyclone® V Device Recommendations
1.7.9. Cyclone® IV Device Recommendations
1.7.10. Cyclone III Device Recommendations
1.6. Conclusion
High-speed FPGA designs at data rates of 10 Gbps and higher require careful attention to material selection and layer stack planning to ensure a robust PCB design. This application note provides a detailed understanding of the PCB stackup construction with considerations for material selection and PCB manufacturability, as well as best practice guidelines for designing the layer stackup arrangement. Specific stackup design guidelines for Intel® FPGA device families are provided at the end of this application note.