F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 6/26/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.14.1.3. TX Equalizer Settings

The TX equalizer settings provides a way to tune your PMA TX buffer to optimize link performance.

To update the TX equalizer settings, follow these steps:

  1. Set csr_txffe_coeff_load (0x45080[0]) to 1’b0.
  2. Set TX equalizer co-efficients to valid settings:
    • TX equalizer pre-cursor 3 register csr_txffe_coeff_p5(0x45084[23:18]).
    • TX equalizer pre-cursor 2 register csr_txffe_coeff_m2(0x45080[7:2]).
    • TX equalizer pre-cursor 1 register csr_txffe_coeff_m1(0x45080[13:8]).
    • TX equalizer main cursor register csr_txffe_coeff_0(0x45080[20:14]).
    • TX equalizer post-cursor 1 register csr_txffe_coeff_p1(0x45080[26:21]).
    • TX equalizer post-cursor 2 register csr_txffe_coeff_p2(0x45084[5:0]).
    • TX equalizer post-cursor 3 register csr_txffe_coeff_p3(0x45084[11:6])
    • TX equalizer post-cursor 4 register csr_txffe_coeff_p4(0x45084[17:12]).
  3. Toggle csr_txffe_coeff_load (0x45080[0]) to 1’b1 and back to 1’b0.
    Note: For the range of TX PMA equalizer parameters, refer to FHT Transmitter PMA Equalizer Parameters for NRZ and PAM4 Modes.
    Table 83.  Main Cursor (C0) Real Co-efficient Values
    Main Cursor (C0) – Register 0x45080[20:14]

    Settings (decimal)

    Real Co-efficient Values
    0 0
    1 0.5
    2 1
    82 41
    83 41.5
    Table 84.  Pre-Cursor (C-1) and Post-Cursor (C1) Real Co-efficient Values

    Pre-Cursor (C-1) – Register 0x45080[13:8]

    Post-Cursor (C1) – Register 0x45080[26:21]

    Settings (decimal)

    Real Co-efficient Values
    0 0
    1 0.5
    2 1
    30 15
    31 15.5
    32 -16
    33 -15.5
    62 -1
    63 -0.5
    Table 85.  Pre-Cursor (C-2, C-3) and Post-Cursor (C2, C3, C4) Real Co-efficient Values

    Pre-Cursor (C-2) – Register 0x45080 [7:2]

    Pre-Cursor (C-3) – Register 0x45084[23:18]

    Post-Cursor (C2) – Register 0x45084[5:0]

    Post-Cursor (C3) – Register 0x45084[11:6]

    Post-Cursor (C4) – Register 0x45084[17:12]

    Settings (decimal)

    Real Co-efficient Values
    0 0
    1 0.25
    2 0.5
    30 7.5
    31 7.75
    32 -8
    33 -7.75
    62 -0.5
    63 -0.25