AN 900: Intel® Arria 10 DisplayPort 8K RX-only Design

ID 683799
Date 7/02/2021
Public

1.5.2. Removing Irrelevant Blocks

The generated DisplayPort SST Parallel Loopback design example consists of TX and RX components. Modify the generated design example by removing the irrelevant blocks from the top-level design and from the dp_core.qsys file.
Remove the TX sub-system and TX PHY top components, and the Pixel Clock Recovery (PCR) and Transceiver Arbiter blocks (in gray), as shown in the diagram below. These blocks are not needed for the RX-only design.
Figure 6. Components Required for the DisplayPort RX-only Design

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