Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series

ID 683761
Date 4/01/2024
Document Table of Contents

6.3.2. Advanced Mode Reconfiguration

In advanced mode, individual I/O PLL setting is reconfigured using the IOPLL Reconfig IP core through the Avalon® interface.

Advanced mode reconfiguration is only recommended for advanced users. This reconfiguration mode has several limitations and can cause the I/O PLL to lose lock and can lead to device reliability problems if you set the configuration parameters to the illegal configuration settings. Intel recommends using the .mif streaming reconfiguration.

The limitations of using the advanced mode reconfiguration are as follows:

  • You must ensure that the configuration setting is a legal value so that the I/O PLL has a legal configuration. To ensure your configuration is legal, refer to the IOPLL IP Core Parameters - Advanced Parameters Tab table for the correct configuration settings.
  • If the value to be reconfigured makes up only a part of one byte in the I/O PLL’s internal memory, you must perform a read-modify-write operation to not overwrite the remaining bits of the byte.
  • You must manually trigger recalibration of the I/O PLL after the advanced mode reconfiguration.
PLL may lose lock and can cause reliability problems to your device if you configure with the wrong PLL setting, configure the wrong bit, or overwrite the whole byte for settings that made up just part of one byte.

To perform I/O PLL reconfiguration using advanced mode, follow these steps:

  1. Enable the Advanced Reconfiguration option in the IOPLL Reconfig IP core.
  2. Set mgmt_address[9:8] = 2’b01 to choose the advanced mode reconfiguration.
  3. Set the address bus value for mgmt_address[7:0] and the data bus value for mgmt_writedata [7:0] as the desired PLL setting.
    For more details, refer to the Address Bus and Data Bus Settings for Advanced Mode Reconfiguration table.
  4. Assert the mgmt_write signal for one mgmt_clk cycle.
  5. Repeat step 1 until step 3 to set address bus and data bus value for the desired I/O PLL reconfiguration setting.
  6. After the I/O PLL reconfiguration is complete, you must manually trigger the I/O PLL recalibration.
    For more details about the I/O PLL recalibration, refer to the Recalibration Using Advanced Mode section.