Visible to Intel only — GUID: zfz1468550248218
Ixiasoft
1.1. JESD204B Intel® Stratix® 10 FPGA IP Design Example Quick Start Guide
The JESD204B Intel® FPGA IP core provides the capability of generating design examples for selected configurations.
Figure 1. Development Stages for the Design Example
Did you find the information on this page useful?
Feedback Message
Characters remaining: