Arria® 10 SoC Boot User Guide

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ID 683735
Date 4/03/2019
Public
Document Table of Contents
Document Table of Contents x
1. Arria 10 SoC Boot User Guide
1. Arria 10 SoC Boot User Guide x
1.1. Boot Process 1.2. Boot Stages 1.3. Boot Devices 1.4. Second-Stage Boot Loader Support Package Generator Tool 1.5. Generating a Boot Loader with an External Flash Boot Device 1.6. Boot and FPGA Configuration 1.7. Boot Debugging 1.8. Appendix A: Building the UEFI Boot Loader 1.9. Revision History for Arria 10 SoC Boot User Guide
1.1. Boot Process x
1.1.1. Typical Boot Flow 1.1.2. Bare Metal Boot Flow 1.1.3. Custom Boot Loader
1.2. Boot Stages x
1.2.1. Reset 1.2.2. First Stage: Boot ROM 1.2.3. Second Stage: Boot Loader (U-Boot)
1.2.2. First Stage: Boot ROM x
1.2.2.1. Boot ROM Flow
1.2.3. Second Stage: Boot Loader (U-Boot) x
1.2.3.1. Second-Stage Boot Flow
1.2.3.1. Second-Stage Boot Flow x
1.2.3.1.1. Typical Boot Flow (Non-Secure) 1.2.3.1.2. Secure Boot Flow
1.3. Boot Devices x
1.3.1. Boot Select 1.3.2. Flash Memory Devices for Booting 1.3.3. Booting From FPGA
1.3.2. Flash Memory Devices for Booting x
1.3.2.1. Quad SPI Flash Devices 1.3.2.2. SD/MMC Flash Devices 1.3.2.3. NAND Flash Devices
1.4. Second-Stage Boot Loader Support Package Generator Tool x
1.4.1. Boot Loader Generation and Flow
1.4.1. Boot Loader Generation and Flow x
1.4.1.1. Step 1: Compiling the FPGA Design 1.4.1.2. Step 2: Hardware Hand-off Files 1.4.1.3. Step 3: Generating the Boot Loader Source 1.4.1.4. Boot Loader Generator Tool: BSP Editor
1.5. Generating a Boot Loader with an External Flash Boot Device x
1.5.1. Prerequisites 1.5.2. Boot Loader Generation Example Using an SD/MMC Controller 1.5.3. Boot Loader Generation Example Using a QSPI Flash Controller 1.5.4. Boot Loader Generation Example Using a NAND Flash Controller
1.7. Boot Debugging x
1.7.1. Cold Boot Debug 1.7.2. Warm Boot Debug 1.7.3. Using the Boot ROM and Boot Loader Debug Registers 1.7.4. Boot Flash Device Issues 1.7.5. HPS Boot Loader Debugging
1.8. Appendix A: Building the UEFI Boot Loader x
1.8.1. Prerequisites 1.8.2. Supported Compiler Toolchains 1.8.3. Obtaining the UEFI Source Code 1.8.4. Compiling the UEFI Source Code with the Linaro Tool Chain 1.8.5. Compiling the UEFI Source Code with the ARM Tool Chain 1.8.6. UEFI Generated Files
1. Arria 10 SoC Boot User Guide

1.4.1.4. Boot Loader Generator Tool: BSP Editor

The BSP Editor tool provides you with guided options to configure and generate a boot loader image. The BSP Editor tool is also used for editing an existing generated boot loader by modifying the BSP configuration settings that are saved in the settings.bsp file. The BSP Editor main interface is shown below.

Figure 20. BSP Editor

The tool provides the configuration options that include selecting:

  • Associated HPS hand-off files
  • Target OS (both U-Boot or UEFI boot use the U-Boot OS selection)
    Note: Although U-Boot is the primary example covered in this user guide, using UEFI as a second-stage boot loader source is also introduced. See "Appendix A: Building the UEFI Boot Loader" for more information.
  • Locations for boot loader
  • Source and configuration settings (BSP settings).

These options are present whether creating a new or editing an existing boot loader configuration. The figure below shows the settings for generating a new boot loader.

Figure 21. BSP Settings for New Boot Loader Generation

When creating a new or editing an existing BSP, the BSP-Editor tool provides the following selections:

  • Preloader settings directory: Location of the HW HPS hand-off files
  • Operating system: Target platform boot loader (U-Boot or UEFI)
  • Version: Target platform boot loader version (use default or recommended)
  • BSP target directory: Location of generated BSP
  • BSP Settings File name: Location of BSP settings file
  • Enable Additional Tcl Script: Includes a Tcl script for additional custom settings
  • Additional Tcl script: Location of additional Tcl script
After the initial configuration settings are entered, you can edit the boot loader source device selection, the platform model selection, and the FPGA configuration files and select whether to automatically build the boot loader after generation. The BSP Editor window below shows an example configuration.
Figure 22. Example Configuration

The continued configuration selections in this window are:

  • boot_device: Selects the target boot device for the generated boot loader
  • model: Target SoC device platform
  • peripheral_rbf_filename: Peripheral FPGA configuration file
  • core_rbf_filename: Core FPGA configuration file
  • disable_uboot_build: When selected, the BSP will not be built (default)
Note: The boot_device configuration is selected in the HPS Qsys component and should not be changed in the boot_device pulldown of this window.
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