Visible to Intel only — GUID: suc1427121095744
Ixiasoft
1.1. Boot Process
1.2. Boot Stages
1.3. Boot Devices
1.4. Second-Stage Boot Loader Support Package Generator Tool
1.5. Generating a Boot Loader with an External Flash Boot Device
1.6. Boot and FPGA Configuration
1.7. Boot Debugging
1.8. Appendix A: Building the UEFI Boot Loader
1.9. Revision History for Arria 10 SoC Boot User Guide
Visible to Intel only — GUID: suc1427121095744
Ixiasoft
1.4. Second-Stage Boot Loader Support Package Generator Tool
The SoC Embedded Design Suite (SoC EDS) includes the second-stage boot loader support package (BSP) generator tool that allows you to generate a boot loader for your FPGA design. The boot generation flow and BSP Editor tool are described in the following sections.
Did you find the information on this page useful?
Feedback Message
Characters remaining: