AN 813: Hierarchical Partial Reconfiguration over PCI Express* Reference Design: for Intel® Arria® 10 Devices
ID
683730
Date
1/20/2021
Public
1.1. Reference Design Overview
1.2. Floorplanning
1.3. Getting Started
1.4. Reference Design Components
1.5. Compiling the Reference Design
1.6. Bringing Up the Reference Design
1.7. Testing the Reference Design
1.8. Extending the Reference Design with Custom Persona
1.9. Reference Design Files
1.10. Document Revision History for AN 813: Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Arria® 10 Devices
1.4.1.3.3. Parent PR Region
The parent PR region contains two sets of PR region controllers and freeze bridges, because of the two child personas within the parent PR region. Each set of PR region controller and freeze bridge is dedicated to one child persona.