AN 813: Hierarchical Partial Reconfiguration over PCI Express* Reference Design: for Intel® Arria® 10 Devices

ID 683730
Date 1/20/2021
Document Table of Contents

1.4.1. BSP Top

This Platform Designer system contains all the subsystems of this reference design. The system comprises the following three main components:
  • The top-level design
  • Intel Arria 10/Cyclone 10 Hard IP for PCI Express IP
  • External Memory Interfaces Intel® Arria® 10 FPGA IP
The system connects to external pins through the wrapper.