AN 813: Hierarchical Partial Reconfiguration over PCI Express* Reference Design: for Intel® Arria® 10 Devices

ID 683730
Date 1/20/2021
Document Table of Contents

1.7. Testing the Reference Design

The reference design provides the following utilities for programming the FPGA board:
  • program-fpga-jtag
  • fpga-configure
  • fpga-region-controller
The design also includes an example_host_uio application to communicate with the device and demonstrate each of the personas.