PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 9/01/2021
Public

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Document Table of Contents

2.2.3.1.1. Clock Frequency Relationships

The following equations describe the relationships between the clock domains available in the PHY Lite for Parallel Interfaces IP.

Core Clock Rate = Interface clock frequency / Core clock frequency

VCO frequency Multiplier Factor = VCO clock frequency 3 / Interface clock frequency

3 You can obtain this value from the VCO clock frequency parameter under General Tab in the IP parameter editor.