OCT Intel® FPGA IP User Guide

ID 683708
Date 7/03/2019
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Document Revision History for OCT Intel® FPGA IP User Guide

Document Version Intel® Quartus® Prime Version IP Version Changes
2019.07.03 19.2 19.1
  • Added support for Intel® Stratix® 10 devices.
  • Updated the following IP names:
    • "Intel® FPGA OCT" to "OCT Intel® FPGA IP"
    • "Intel® FPGA GPIO" to "GPIO Intel® FPGA IP"
  • Updated the s2pload signal:
    • Removed s2pload from available user signals.
    • Updated descriptions regarding the s2pload signal behavior.




November 2017 2017.11.06
  • Added support for Intel® Cyclone® 10 GX devices.
  • Renamed Altera OCT IP core to Intel® FPGA OCT IP core.
  • Renamed Qsys to Platform Designer.
  • Updated text for additional Intel rebranding.
May 2017 2017.05.08 Rebranded as Intel.
December, 2015 2015.12.07
  • Changed instances of "megafunction" to "IP core".
  • Changed instances of Quartus II to Quartus Prime.
  • Various edits to contents and links to improve style and clarity.
August, 2014


  • Added information about OCT calibration in user mode.
  • Updated the IP core signals and parameters:
    • core_rzqin_export changed to rzqin
    • core_series_termination_control_export changed to oct_<x>_series_termination control[15:0]
    • core_parallel_termination_control_export changed to oct_<x>_parallel_termination_control[15:0]

November, 2013


Initial release.