OCT Intel® FPGA IP User Guide

ID 683708
Date 7/03/2019

OCT Intel® FPGA IP Overview

Figure 1.  OCT IP Top-Level DiagramThis figure shows the top-level diagram of the OCT IP.

Table 1.   OCT IP Components
Component Description
RZQ pin
  • Dual-purpose pin.
  • When used with OCT, the pin connects to an external reference resistor to calculate the calibration codes to implement the required impedance.
OCT block Generates and sends calibration code words to the I/O buffer blocks.
OCT logic Receives the calibration code words serially from the OCT block and sends the calibration code words in parallel to the buffers.

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