Remote Update Intel® FPGA IP User Guide

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ID 683695
Date 7/13/2021
Public
Document Table of Contents

1. Remote Update Intel® FPGA IP User Guide

Updated for:
Intel® Quartus® Prime Design Suite 18.0

The Remote Update Intel® FPGA IP core implements a device reconfiguration using dedicated remote system upgrade circuitry available in supported devices. Remote system upgrade helps you deliver feature enhancements and bug fixes without recalling your product, reduces time-to-market, and extends product life. The Remote Update Intel® FPGA IP core commands the configuration circuitry to start a reconfiguration cycle.

The dedicated circuitry performs error detection during and after the configuration process. When the dedicated circuitry detects errors, the circuitry facilitates system recovery by reverting back to a safe, default factory configuration image and then provides error status information.

The following figures shows a functional diagram for a typical remote system upgrade process.

Figure 1. Typical Remote System Upgrade Process
Note: Intel® recommends that you use the following Remote Update Intel® FPGA IP core input clock (fMAX) values:
  • 10 MHz—for Arria® II and Stratix® IV devices
  • 20 MHz—for other supported devices
Figure 2. High-Level Block Diagram of Remote System Upgrade
Note: The remote system upgrade feature support for each configuration scheme varies between device family. For more information about the configuration scheme and the remote system upgrade feature, please refer to the configuration chapter of the respective device family handbook.

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