AN 845: Signal Tap Tutorial for Intel® Arria® 10 Partial Reconfiguration Design

ID 683662
Date 10/08/2018

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Tutorial Walkthrough

This tutorial describes preparing the blinking_led design for debug with the Signal Tap Logic Analyzer.
Note: This Application Note only covers adding Signal Tap debugging capabilities to a PR design. For information about turning a non-PR design to PR, refer to AN 797: Partially Reconfiguring a Design on Intel® Arria® 10 GX FPGA Development Board .

Process Description

To tap signals in a PR design, you extend the debug fabric to the PR regions when creating the base revision, and then define debug components for the implementation revisions.