AN 845: Signal Tap Tutorial for Intel® Arria® 10 Partial Reconfiguration Design

ID 683662
Date 10/08/2018

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Step 7: Generating Programming Files

The design is now ready for compilation. The Intel® Quartus® Prime Compiler generates files that you then program into the FPGA. This Partial Reconfiguration design requires generating .sof and .rbf files.
  1. Ensure the blinking_led.qsf contains the following assignments:
    set_global_assignment -name GENERATE_PR_RBF_FILE ON
    set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF
    These assignments allow the assembler to automatically generate the required PR bitstreams.
  2. In the Intel® Quartus® Prime GUI, click Processing > Start Compilation to compile the base revision.
    Alternatively, type the following command:
    quartus_sh --flow compile blinking_led -c blinking_led
  3. Compile the implementation revision:
    quartus_sh --flow compile blinking_led –c blinking_led_slow
    quartus_sh --flow compile blinking_led –c blinking_led_default
    quartus_sh --flow compile blinking_led –c blinking_led_empty
If the compilation succeeds, the output files are now in the output_files directory.