Nios® V Processor Reference Manual

ID 683632
Date 6/30/2022

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Document Table of Contents

2.3.1. General Purpose Register File

Nios® V/m processor implementation supports a flat register file, consisting of thirty-two 32-bit general-purpose integer registers. Nios® V/m processor implements the General Purpose Register using M20K memories, which do not support two read ports. Hence, Nios® V/m processor duplicate register files so that two different operands for an instruction are available in a single cycle and write the same values to the memories.