Intel® Agilex™ Hard Processor System Component Reference Manual

ID 683581
Date 2/07/2023

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2.5. I/O Delays

The I/O Delays tab is the fourth of five tabs in the HPS component that allows you to add an optional delay chain to the input or output of any of the 48 HPS dedicated I/O pins. Each dropdown allows you to select between the following options for the corresponding I/O pin:
  • Zero_chain_dly—input or output signal bypasses the delay chain
  • Chain_dly—input or output signal goes through the minimum delay chain path
  • One_chain_dly to thirty_chain_dly—input or output signal goes through between one to thirty chain delays, in addition to the minimum delay chain path
Figure 23.  Platform Designer I/O Delays
Figure 24. Example of 3-Chain-Delay

For more information about the delay timings, refer to the Intel® Agilex™ Device Datasheet.