Intel® Agilex™ Hard Processor System Component Reference Manual

ID 683581
Date 2/07/2023

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3.9. FPGA-to-HPS System Trace Macrocell Hardware Event Interface

The FPGA‑to‑HPS STM hardware event interface is connected to an Intel® conduit BFM for simulation. The following table lists the name of each interface, along with the API function name for each type of simulation. You can monitor the interface state changes or set the interface by using the API functions listed.

Table 29.  FPGA-to-HPS STM Hardware Event Interface Simulation Model

Interface Name

BFM Name

RTL Simulation API Function Name

Post‑Fit Simulation API Function Name

f2h_stm_hw_events f2h_stm_hw_events_inst get_f2h_stm_hwevents() get_stm_events()