Intel® Agilex™ Hard Processor System Component Reference Manual

ID 683581
Date 2/07/2023

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3.12. FPGA-to-HPS DMA Handshake Interface

The FPGA‑to‑HPS DMA handshake interface is connected to an Intel® conduit BFM for simulation. The following table lists the name for each interface, along with API function names for each type of simulation. You can monitor the interface state changes or set the interface by using the API listed.

Table 32.  FPGA-to-HPS DMA Handshake Interface Simulation ModelThe usage of conduit get_*() and set_*() API functions is the same as with the general Avalon® conduit BFM.

Interface Name

BFM Instance Name

RTL Simulation API Function Names

Post‑Fit Simulation API Function Names

f2h_dma0 f2h_dma0_inst get_f2h_dma0_req() get_channel0_req()
get_f2h_dma0_single() get_channel0_single()
set_f2h_dma0_ack() set_channel0_xx_ack()
f2h_dma1 f2h_dma1_inst get_f2h_dma1_req() get_channel1_req()
get_f2h_dma1_single() get_channel1_single()
set_f2h_dma1_ack() set_channel1_xx_ack()
f2h_dma2 f2h_dma2_inst get_f2h_dma2_req() get_channel2_req()
get_f2h_dma2_single() get_channel2_single()
set_f2h_dma2_ack() set_channel2_xx_ack()
f2h_dma3 f2h_dma3_inst get_f2h_dma3_req() get_channel3_req()
get_f2h_dma3_single() get_channel3_single()
set_f2h_dma3_ack() set_channel3_xx_ack()
f2h_dma4 f2h_dma4_inst get_f2h_dma4_req() get_channel4_req()
get_f2h_dma4_single() get_channel4_single()
set_f2h_dma4_ack() set_channel4_xx_ack()
f2h_dma5 f2h_dma5_inst get_f2h_dma5_req() get_channel5_req()
get_f2h_dma5_single() get_channel5_single()
set_f2h_dma5_ack() set_channel5_xx_ack()
f2h_dma6 f2h_dma6_inst get_f2h_dma6_req() get_channel6_req()
get_f2h_dma6_single() get_channel6_single()
set_f2h_dma6_ack() set_channel6_xx_ack()
f2h_dma7 f2h_dma7_inst get_f2h_dma7_req() get_channel7_req()
get_f2h_dma7_single() get_channel7_single()
set_f2h_dma7_ack() set_channel7_xx_ack()