Multi Channel DMA for PCI Express* Intel® FPGA IP Design Example User Guide

ID 683517
Date 12/01/2021
Public

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3.5.2.4.3.1. Example of Verifying on an AVMM Design

Modify the below macro in the following file: user/common/include/ifc_libmqdma.h

#define PCIe_SLOT 0 /* 0 – x16, 1 – x8 */
Use this command:
Command: $ ./perfq_app -b 0000:01:00.0 -p\  
32768 -l 5 -i  -c 2 -d 2 -a 4

Configuration:

a. bdf (-b 0000:01:00.0)

b. 1 channel (-c 2)

c. Loopback (-i)

d. Payload length of 32768 bytes in each descriptor (-p 32768)

e. Time limit set to 5 (-l 5)

f. debug log enabled (-d 2)

g. One thread per queue (-a 4)

Note: To test the data validity, you need to perform H2D then D2H operations.

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